Please use this identifier to cite or link to this item:
http://hdl.handle.net/20.500.12358/24747
Title | Implementing Sequential Function Charts Using FPGAs |
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Untitled | |
Abstract |
Sequential Function Chart (SFC) is a graphical programming language defined in IEC 61131-3 as a standard programming language for Programable Logic Controllers (PLCs). It provides an excellent method for formal specification of discrete events systems. In this paper we describe a method to implement SFCs using Field Programmable Gate Arrays (FPGAs). The method is based on converting the SFC to a Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) which is a standard language used to configure FPGAs. The algorithm is successfully employed on an experimental platform using Xilinx Spartan-3 FPGA. Implementing SFCs on FPGAs satisfy the requirements of downsizing, hiding information, reducing costs, while adding high speed capabilities. |
Authors | |
Type | Journal Article |
Date | 2005 |
Published in | Proceedings of the Seventh IASTED International Conference on Control and Applications, Cancun, Mexico |
Citation | |
Item link | Item Link |
License | ![]() |
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Files in this item | ||
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Abdelati, Mohamed M._9.pdf | 757.3Kb |