A methodology for the development of system-level simulation models for analog functional blocks

Abstract

Methods for generating macromodels for analog functional blocks as reported in literature are of limited use in general circuit simulation due to either accuracy or efficiency problems. In this paper we propose a new approach to model the behavior of functional blocks based on model generators and a framework for their development. Experimental results obtained for different classes of functional blocks indicate that the outlined methodology results in efficient and accurate models to be used in system-level design validation